Hardware-in-the-Loop Simulation A Scalable, Component-based, Time-triggered Hardware-in-the-loop Simulation Framework - Martin Schlager
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Safety-critical real-time systems must guarantee correct operation in all operational conditions - even if these conditions are very unlikely to occur (rare events). Hardware-in-the-Loop (HiL) simulation is a common validation technique of real-time systems. In an HiL simulation the environment of a System-Under-Test (SUT) is simulated by an assigned HiL simulator. Thereby, the SUT interacts with the HiL si ... Täielik kirjeldus
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Kirjeldus
Lisateave
| Autor | Martin Schlager |
|---|---|
| Kirjastaja | VDM Verlag Dr.Müller |
| Väljalaskeaasta | 2008 |
| Kaanetüüp | Pehme kaanega |
| EAN | 9783836462167 |