The book gives an extensive view of different memory architecture used in parallel computer; mainly it covers shared memory. After analyzing different memory architecture for shared memory abstraction, we choose Distributed Shared Memory (DSM) architecture. The performance and the programmability of the DSM system depend upon the Memory Consistency Model and Memory Coherency. The memory consistency model of a DSM system specifies the ordering constraints on concurrent memory accesses by multiple processors. Lots of Consistency Model are defined by a wide variety of source including architecture system, application programmer etc. The memory consistency models can be combined in two ways, uniform memory model which consider only ¿Read¿ & ¿Write¿ memory operation and hybrid memory model which not only consider ¿Read¿ & ¿Write¿ memory operation but also it consider process synchronization operation also. For uniform memory model, Atomic, Sequential, Casual, Processor, PRAM, and Slow memory consistency model are taken and for hybrid memory model Weak, Entry, Release, Scope & View Consistency model are taken.