Tasuta kohaletoimetamine tellimustele üle 29 €
  • check 10+ miljonit raamatut
  • check Uued tooted iga päev
  • check Meid usaldab üle 1 miljoni kliendi
  • check Hea hind ja allahindlused
  • check Tarne üle kogu Euroopa

The e Hardware Verification Language - Sunita Joshi,Sasan Iman

inglise keel
2004-05-28
203,27 € 338,78 €

-40% koodiga BOOKS

Meie tarnija laos

Saadetis 17-23 tööpäeva jooksul

30-päevane tagastamisõigus

I am glad to see this new book on the e language and on verification. I am especially glad to see a description of the e Reuse Methodology (eRM). The main goal of verification is, after all, finding more bugs quicker using given resources, and verification reuse (module-to-system, old-system-to-new-system etc. ) is a key enabling component. This book offers a fresh approach in teaching the e hardware verifi ... Täielik kirjeldus

Võib-olla meeldib sulle ka

Kirjeldus

I am glad to see this new book on the e language and on verification. I am especially glad to see a description of the e Reuse Methodology (eRM). The main goal of verification is, after all, finding more bugs quicker using given resources, and verification reuse (module-to-system, old-system-to-new-system etc. ) is a key enabling component. This book offers a fresh approach in teaching the e hardware verification language within the context of coverage driven verification methodology. I hope it will help the reader und- stand the many important and interesting topics surrounding hardware verification. Yoav Hollander Founder and CTO, Verisity Inc. Preface This book provides a detailed coverage of the e hardware verification language (HVL), state of the art verification methodologies, and the use of e HVL as a facilitating verification tool in implementing a state of the art verification environment. It includes comprehensive descriptions of the new concepts introduced by the e language, e language syntax, and its as- ciated semantics. This book also describes the architectural views and requirements of verifi- tion environments (randomly generated environments, coverage driven verification environments, etc. ), verification blocks in the architectural views (i. e. generators, initiators, c- lectors, checkers, monitors, coverage definitions, etc. ) and their implementations using the e HVL. Moreover, the e Reuse Methodology (eRM), the motivation for defining such a gui- line, and step-by-step instructions for building an eRM compliant e Verification Component (eVC) are also discussed.

Lisateave

Autor Sunita Joshi, Sasan Iman
Kirjastaja Springer US
Väljalaskeaasta 2004
Kaanetüüp Kõvakaaneline
EAN 9781402080234
Kirjuta oma arvustus
Te vaatate: The e Hardware Verification Language
Teie hinnang:

Goodreads'i arvustused

203,27 € 338,78 €