Tasuta kohaletoimetamine tellimustele üle 29 €
  • check 10+ miljonit raamatut
  • check Uued tooted iga päev
  • check Meid usaldab üle 1 miljoni kliendi
  • check Hea hind ja allahindlused
  • check Tarne üle kogu Euroopa

Timing - Sachin Sapatnekar

inglise keel
2004-06-02
237,15 € 338,78 €

-30% koodiga BOOKS

Meie tarnija laos

Saadetis 17-23 tööpäeva jooksul

30-päevane tagastamisõigus

Statistical timing analysis is an area of growing importance in nanometer te- nologies¿ as the uncertainties associated with process and environmental var- tions increase¿ and this chapter has captured some of the major efforts in this area. This remains a very active field of research¿ and there is likely to be a great deal of new research to be found in conferences and journals after this book is publishe ... Täielik kirjeldus

Võib-olla meeldib sulle ka

Kirjeldus

Statistical timing analysis is an area of growing importance in nanometer te- nologies¿ as the uncertainties associated with process and environmental var- tions increase¿ and this chapter has captured some of the major efforts in this area. This remains a very active field of research¿ and there is likely to be a great deal of new research to be found in conferences and journals after this book is published. In addition to the statistical analysis of combinational circuits¿ a good deal of work has been carried out in analyzing the effect of variations on clock skew. Although we will not treat this subject in this book¿ the reader is referred to [LNPS00¿ HN01¿ JH01¿ ABZ03a] for details. 7 TIMING ANALYSIS FOR SEQUENTIAL CIRCUITS 7.1 INTRODUCTION A general sequential circuit is a network of computational nodes (gates) and memory elements (registers). The computational nodes may be conceptualized as being clustered together in an acyclic network of gates that forms a c- binational logic circuit. A cyclic path in the direction of signal propagation 1 is permitted in the sequential circuit only if it contains at least one register . In general, it is possible to represent any sequential circuit in terms of the schematic shown in Figure 7.1, which has I inputs, O outputs and M registers. The registers outputs feed into the combinational logic which, in turn, feeds the register inputs. Thus, the combinational logic has I + M inputs and O + M outputs.

Lisateave

Autor Sachin Sapatnekar
Kirjastaja Springer US
Väljalaskeaasta 2004
Kaanetüüp Kõvakaaneline
EAN 9781402076718
Kirjuta oma arvustus
Te vaatate: Timing
Teie hinnang:

Goodreads'i arvustused

237,15 € 338,78 €