Ultrasonographic Image Processing System is basically the first initiative to develop the ultrasonographic Imaging System in India itself, because of its high cost and huge use. Finally FPGA Implementation because of its reconfigurability. Ultrasonics has a large number of applications, which are mainly, divided into two major categories, high-intensity applications and low-intensity applications. Here we are mainly looking for Medical applications. There are a number of modules of this complete system and here in this book focuses on modules such as Modeling of the System and Implementation on FPGA kit. Some of the algorithms used in image processing are usually implemented in software but may also be implemented in some modeling tools such as Ptolemy and also special purpose hardware for reduced speed. In the present work Median filter algorithm for removing salt and pepper type of noise and edge detection algorithm has been implemented using reconfigurable architecture and Hardware model will be implemented using the Xilinx ISE 7.01 tool on the XC2VP7 (or XC2V1000) vertex Embedded Development Board. The algorithm will be tested on standard image processing benchmarks.